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  • !5835

i#5365: Add AArch64 SVE vector length support (part 1)

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Open Assad Hashmi requested to merge i5365-aarch64-sve-veclen-part1 into master Jan 24, 2023
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This patch adds Arm's Scalable Vector Extension vector length support. The vector length is determined at runtime on startup in get_processor_specific_info() and available using proc_get_vector_length().

Cleancall, machine and signal context code have been updated to handle SVE registers as have API functions like reg_get_size() which will return the hardware's vector size rather than OPSZ_SCALABLE.

The SVE specification allows for a maximum vector length of 2048 bits. We currently support 512 bits maximum due to DR's stack size limitation. There is currently no stock SVE hardware with vector lengths greater than 512 bits.

There will be follow on patches to add:

  • Predicate registers.
  • Handling of First Fault Register (FFR).
  • Targetted SVE tests.

Issue: #5365, #3044

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Source branch: i5365-aarch64-sve-veclen-part1