Created by: joshua-warburton
Previous patches to deal with operand/opcode overlaps (#5071, #5082, #5091) did not handle cases in which an opcode matches the operand value. In such cases decode logic generated by codec.py could not distinguish between input encodings of different opcodes.
This patch adds the + character to operand masks which requires that at least one of the bits in masks marked + must be set for that instruction to be considered matching.
An example is the following where bits 19->22 are 0000 for fmov but cannot be 0000 for fcvtzs as specified by the ISA:
0x00111100000xxx111111xxxxxxxxxx fmov dq0 : fpimm8 h_sz 0x0011110xxxxxxx111111xxxxxxxxxx fcvtzs dq0 : dq5 bhsd_immh_sz immhb_fxp
For which the immh:immb operand mask is now: ---------++++xxx---------------- immhb_fxp
Issues: #5070 (closed), #2626