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  • DynamoRIO
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  • !4843

i#1738 dr$sim perf: Improve tag lookup speed with a hashtable

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Merged Derek Bruening requested to merge i1738-drcachesim-tag2block into master Apr 07, 2021
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Replaces drcachesim's loops over all ways with a hashtable lookup. For larger cache hierarchies and caches with higher associativity this increases performance by 15% in cpu-bound tests on offline traces, when we use a large initial table size to avoid resizes which seem to outweigh the gains.

The hashtable unfortunately results in a 15% slowdown on simple cache hierarchies, due to the extra time in erase() and other maintenance operations outweighing the smaller gains in lookup. Thus, we make the default to not use a hashtable and use the original linear walk, providing a method to optionally enable the hashtable. The cache simulator enables the hashtables for any 3+-level cache hierarchy with either coherence or many cores.

Adds coherence to some existing 3-level-hierarchy tests to ensure we have tests that cover the hashtable path.

The TLB simulator will need to tweak these hashtables: but it looks like it is already doing the wrong thing in invalidate() and other simulator_t methods, filed as #4816.

Issue: #1738, #4816

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Source branch: i1738-drcachesim-tag2block