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i#1569 AArch64: Fix bug in encoding (SIMD structure load/store).

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Merged Administrator requested to merge i1569-x16imm into master Jul 12, 2017
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Created by: egrimley

The "x16imm" operand type can be a register, or a constant denoted in the encoding by register number 31. The value of the constant can be determined from various bits in the instruction, but those bits can not be uniquely determined from the constant operand. In particular, we can not generate bit 30 in this case. Within the constraints of the current formalism the best solution seems to be to remove bit 30 from the bits generated by x16imm and duplicate the 14 bit patterns that use x16imm.

There are other instances of such duplication. The formalism should perhaps be improved.

Change-Id: I319d8e4b9550d39b11f5dce80fe7801115445446

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Source branch: i1569-x16imm