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  • !2411

i#2129: Remove FPSR NZCV bits from allasm_aarch64_isa test.

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Merged Administrator requested to merge i2129-fix-allasm-aarch64-isa into master May 03, 2017
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Created by: geoste01

The allasm_aarch64_isa test attempts to check that we can set and retain values in the NZCV bits of the floating-point status register (FPSR), however this functionality is intended for supporting AArch32 floating point arithmetic and may not be present in AArch64 processors. In AArch64, instructions that set or use these flags instead use the ordinary NZCV bits.

Fixes #2129 (closed)

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Source branch: i2129-fix-allasm-aarch64-isa