Support missing x86 instructions, fix existing ones.

Pulling in binutils assembler tests leads to finding some cases that I think we do not support.

0f ff 07 ud0 (%edi),%eax Intel's Spec. mentions this:

1. Some older processors decode the UD0 instruction without a ModR/M byte. As a result, those processors would deliver an invalidopcode exception instead of a fault on instruction fetch when the instruction with a ModR/M byte (and any implied bytes) would cross a page or segment boundary.

Do we fall in this category? Looks like SW can't really rely on this instruction being decoded correctly, so we don't necessarily have to support it.

I will add more if I find anything.

xref #3577 (AMD exclusive).